In late 2012, Intel brought to market the Xeon Phi Coprocessor, based on their Many Integrated Core (MIC) architecture. The basis of the Intel MIC architecture is to leverage x86 legacy by creating a x86-compatible multiprocessor architecture that can utilize existing parallelization software tools.
However, there is no direct compatibility with GROMACS, as the Pentium class chips lack modern chip optimizations like SSE, but a SIMD or OPENCL port is not out of the question at some future point. The hardware cost puts this out of the reach of most consumers, and will mostly see an institutional customer base, futher limiting its possible adoption. This platform is being watched as it matures.